O CASO DE –A-MO(S) VERSUS –E-MO(S) e –E-MO(S) VERSUS –I-MO(S): VARIAÇÃO MORFÊMICA OU ESPECIALIZAÇÃO TEMPORAL?

نویسندگان

چکیده

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

The MOS Multimedia E-Mail System

In this paper, we present the architecture of a new multimedia E-mail system, which has been successfully developed in the Communication and Multimedia Laboratory of National Taiwan University. This prototype E-mail system is fully compatible with traditional Internet E-mails i n that the multimedia emails can be sent through Internet. For allowing one to compose multimedia emails, the system p...

متن کامل

The MOS Single Electron Transistor (MOS-SET)

We study very small gated SOI nanowires defined by e-beam lithography. Electrical transport at low temperature (below ≈ 10K) is dominated by Coulomb blockade. In the metallic regime at high Vg very periodic oscillations are recorded and the measured period corresponds to the whole surface of wire covered by the gate. Below the threshold the energy level quantization is clearly seen. The interpl...

متن کامل

Gate structural engineering of MOS-like junctionless Carbon nanotube field effect transistor (MOS-like J-CNTFET)

In this article, a new structure is presented for MOS (Metal Oxide Semiconductor)-like junctionless carbon nanotube field effect transistor (MOS-like J-CNTFET), in which dual material gate with different work-functions are used. In the aforementioned structure, the size of the gates near the source and the drain are 14 and 6 nm, respectively, and the work-functions are equal and 0.5 eV less tha...

متن کامل

Gate structural engineering of MOS-like junctionless Carbon nanotube field effect transistor (MOS-like J-CNTFET)

In this article, a new structure is presented for MOS (Metal Oxide Semiconductor)-like junctionless carbon nanotube field effect transistor (MOS-like J-CNTFET), in which dual material gate with different work-functions are used. In the aforementioned structure, the size of the gates near the source and the drain are 14 and 6 nm, respectively, and the work-functions are equal and 0.5 eV less tha...

متن کامل

Optimizing MOS Transistor Mismatch

An investigation of MOS transistor mismatch is undertaken and a methodology is developed for optimizing mismatch without increasing layout area. Dramatic improvements of up to 300% in matching can be realized by selecting the optimum W=L ratio without changing the overall WL area product. The theoretical basis for the obtainable improvements is fully described and an expression is derived and v...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: Caderno Seminal

سال: 2018

ISSN: 1806-9142,1414-4298

DOI: 10.12957/cadsem.2018.32693